EDK II Minimum Platform Specification
Tables
Figures
1 Introduction
1.1 Audience / Document scope
1.2 Document Flow
1.3 Terminology
1.4 Reference documents
2 Architecture
2.1 Staged Architecture
2.2 Modularity
2.3 Execution
2.4 Organization
2.5 Platform and Board Layer
3 Stage I: Minimal Debug
3.2 Firmware Volumes
3.3 Modules
3.4 Required Functions
3.5 Configuration
3.6 Data Flows
3.7 Additional Control Flows
3.8 Build Files
3.9 Test Point Results
3.10 Functional Exit Criteria
3.11 Stage Enabling Checklist
4 Stage II: Memory Functional
4.2 Firmware Volumes
4.3 Modules
4.4 Required Functions
4.5 Configuration
4.6 Data Flows
4.7 Additional Control Flows
4.8 Build Files
4.9 Test Point Results
4.10 Functional Exit Criteria
4.11 Stage Enabling Checklist
5 Stage III: Boot to UEFI Shell
5.2 Firmware Volumes
5.3 Modules
5.4 Required Functions
5.5 Configuration
5.6 Data Flows
5.7 Additional Control Flows
5.8 Build Files
5.9 Test Point Results
5.10 Functional Exit Criteria
5.11 Stage Enabling Checklist
6 Stage IV: Boot to OS
6.2 Firmware Volumes
6.3 Modules
6.4 Required Functions
6.5 Configuration
6.6 Data Flows
6.7 Additional Control Flows
6.8 Build Files
6.9 Test Point Results
6.10 Functional Exit Criteria
6.11 Stage Enabling Checklist
7 Stage V: Security Enable
7.2 Firmware Volumes
7.3 Modules
7.4 Required Functions
7.5 Configuration
7.6 Data Flows
7.7 Additional Control Flows
7.8 Build Files
7.9 Test Point Results
7.10 Functional Exit Criteria
7.11 Stage Enabling Checklist
8 Stage VI: Advanced Feature Selection
8.2 Firmware Volumes
8.3 Configuration
8.4 Advanced Feature Design
9 Stage VII: Tuning
Appendix A Full Maps
A.1 Firmware Volume Layout
A.2 Key Function Invocation
A.3 BDS Hook Points
Appendix B Global Configuration
B.1 Stage Configuration
B.2 Test Point Check Infrastructure
Appendix C ACPI
C.1 Layout
C.2 ACPI Table Contents
C.3 ACPI Device Categorization
C.4 Flow Diagrams
Appendix D Interface Definitions
D.1 Required Functions
D.2 BoardInit
D.3 SiliconPolicyInit
D.4 TestPoint
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Appendix D Interface Definitions
EDK II Minimum Platform Specification
DRAFT [12/01/2020 06:42:28]
Revision 0.7
Appendix D Interface Definitions Overview
This section contains interface definitions defined in the Minimum Platform architecture.
EDK II Minimum Platform Specification
DRAFT [12/01/2020 06:42:28]
Revision 0.7