Figures

• Figure 1 Minimum Platform Architecture Overview
• Figure 2 Minimum Platform Architecture High Level Sequence
• Figure 3 Example of a Minimal Platform Firmware Stack
• Figure 4 Stage I Main Control Flow
• Figure 5 Stage II Main Control Flow
• Figure 6 Non-FSP Policy Data Flow
• Figure 7 FSP Policy Data Flow
• Figure 8 Stage III Main Control Flow
• Figure 9 Stage IV Main Control Flow
• Figure 10 Full BDS Hook Point Map
• Figure 11 Test Point Check Infrastructure
• Figure 12 ACPI Platform Flow